1. Field of the Invention
The present invention relates to a non recursive analog integrator, more especially an integrator using the charge transfer for integrating an analog signal sampled over M sequences.
Integrators are generally used for processing analog signals which may be defined as a repetitive and slowly varying sequence, either for reducing the energy of the signal transmitted or for removing noise from the signal received. In fact, integration of these repetitive sequences improves the signal/noise ratio by a factor .sqroot.M if the integration takes place over M sequences. Thus, integrators may for example be used for detecting the spectral lines of a recurrent spectrum at the output of an acoustic surface wave analyzer.
2. Description of the Prior Art
The integrators used for this type of processing may be digital or analog, recursive or non recursive integrators.
Digital integrators have the drawback of requiring a very long processing time. Furthermore, the analog sampling frequency and the dynamics are limited by the input analog-digital converter.
There also exist different types of recursive or non recursive analog integrators using charge transfer devices.
As shown schematically in FIG. 1, recursive analog integrators are generally formed by a charge transfer shift register 1 whose output signal S is relooped back to the input signal E to which it is added in the summator .SIGMA.. However, because of the deterioration of integration due to transfer inefficiency in the charge transfer register 1, the relooping number is limited. Moreover, the heat generation of charges in register 1 causes rapid saturation of the register and is a factor of instability in the loop.
As shown in FIG. 2, a non recursive analog integrator is formed essentially by N charge transfer shift registers R.sub.1, R.sub.2 . . . R.sub.N, with a series input and parallel output, each register comprising M stages for integrating the M samples of rank n (n varying between 1 and N) of the input signal, the N registers R.sub.1, R.sub.2 . . . R.sub.N being connected between an input addressing register R.sub.A and output addressing register R.sub.B successively addressing, by switching analog gates G.sub.1, . . . G.sub.N and G'.sub.1, . . . G'.sub.N, the inputs or the outputs of the N shift registers R.sub.1, R.sub.2, . . . R.sub.N for inputting first of all into the shift registers R.sub.1, R.sub.2, . . . R.sub.N M times the sampled input signal E then for extracting an analog signal S corresponding to the sum of the inputted signals. However, the heat generation in shift registers of the charge transfer type limits the integration time.